www.drgateway.com/dr-embedded
SEARCH IP   
    • Categories
    • RISC-V
    • Embedded Processing
    • 5G, 3GPP LTE IP
    • IoT IP
    • Artificial Intelligence IP
    • Automotive IP
    • Space and Avionics
    • Security IP
    • Audio & Video IP
    • Design Platforms
    • Monitoring and Verification
    • SoC Design Services
    • Find your best SoC design partner
Partner Videos D&R Events
    • IP-SoC Days 2024
    • IP-SoC Days 2023
    • IP-SoC Days 2022
    • IP-SoC Days 2021
    • IP-SoC Days 2020
    • IP-SoC 2023
    • IP-SoC 2022
    • IP-SoC 2021
    • IP-SoC 2020
NEWS
Graphic - Peripheral IP IP Catalog
 Arbiter (1)
 Audio Controller (5)
 Clock Generator (3)
 CRT Controller (1)
 Disk Controller (8)
 DMA Controller (16)
 GPU (39)
 Input/Output Controller (17)
 Interrupt Controller (1)
 LCD Controller (4)
 Peripheral Controller (6)
 Receiver/Transmitter (49)
 Timer/Watchdog (22)
 VME Controller (5)
 Other (29)
Search Solutions  
OK
17 "Input/Output Controller" IP

1
I3C Dual Controller
The Arasan I3C Secondary Controller IP Core implements Active controller functionality as defined by the MIPI Alliance’s I3C Specification and Secondary Controller logic. The I3C bus is used for vari...

2
I3C Host Controller
The MIPI I3C interface is an evolutionary standard that improves upon the features of I2C, while maintaining backward compatibility. This standard offers a flexible multi-drop interface between the ho...

3
I3C Prototyping Kit (HDK) Total IP in a Box
The I3C Total IP in a box HDK gives I3C SoC developers all the resources they need to implement MIPI I3C specifications right out of the box. The HDK contains I3C Master and Slave FPGA Boards program...

4
I3C Slave Controller
The Arasan I3C Slave Controller IP Core Implements Slave functionality as defined by the MIPI Alliance’s I3C Specification. The I3C bus is used for various sensors in the mobile/automotive system wher...

5
MIPI I3C PHY I/O
Arasan’s MIPI I3CⓇ PHY I/O IP, in compliance with MIPI I3CⓇ specifications v1.1. Arasan’s MIPI I3CⓇ PHY IP is part of Arasan’s Total IP Solution for MIPI I3CⓇ v1.1. Arasan’s 2-wire MIPI I3CⓇ PHY I/O c...

6
Quad SPI Master IP
Arasan Chip Systems Quad SPI (QSPI) master core is easy to use, simple to work with, quick to operate, and reliable under all conditions. It supports the majority of QSPI devices standard from a stand...

7
xSPI - PSRAM Master
Arasan Chip System’s xSPI/PSRAM master IP is easy to use, simple to work with, quick to operate, and reliable under all conditions. It supports the xSPI JESD~251 standard from a standard AXI3 or AXI4...

8
xSPI Master IP | NOR IP
Arasan Chip Systems, the leading provider of IP for Mobile Storage Standards, presents its latest xSPI Master IP for access to NOR Flash Devices. This Universal NOR Flash IP supports a variety of NOR ...

9
APB4 General Purpose Input/Output Module
The APB4 GPIO Core is fully parameterised core designed to provide a user-defined number of general purpose, bidirectional IO to a design.

10
General Purpose I/O (GPIO) 1.8V Fail-Safe IO - TSMC 16nm 16FFC,FF
Dolphin Technology's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, SerDes, Xaui Ethernet, SPI4.2 and more.

11
Virtual GPIO IP
Virtual GPIO interface provides host processor to peripheral connectivity using standard data interface such as PCIe, USB, UART, compatible with MIPI Virtual GPIO v0.9 standard. Through its Virtual GP...

12
Customizable Display Controller with composition support
CDC is a fully Customizable Display Controller IP core family supporting the OpenWF display API specification. Several features can be configured at synthesis time and controlled at run time via a reg...

13
Customizable Video Input Controller with color space conversion
CVI is a fully Customizable Video Input controller IP core. The video input controller can be applied to e.g. FPGA systems with a resource optimized, application specific feature configuration or to A...

14
General Purpose Input / Output Controller (GPIO)
This general purpose input/ output controller provides some unique features that eases system integration and use. Each GPIO port can be configured for input, output or bypass mode. Output data can be...

15
Multi Protocol IO Concentrator (RDC) IP Core for Safe and Secure Ethernet Network
Our IP Core is the ideal solution to link all your equipment, sensor or actuator whatever the used protocol to an Avionic network in a safe & secure manner.

16
UART : Universal Asynchronous Receiver Transmitter Core
Universal Asynchronous Receiver Transmitter Core performs serial-to-parallel conversion on data characters received from a peripheral device or a MODEM and parallel-to-serial conversion on data charac...

17
Warping Engine IP block for image transformation, HUDs and fish-eye correction
TES Warping Engine is a specialized IP core for arbitrary high-performance re-mapping of bitmaps from memory-to-memory or memory-to-stream. Applications are for example pre-warping for projection on h...

 Back

Partner with us

Contact Us
Partnership Offers

List your Products

Suppliers, list and add your products for free.

List your Products

More about D&R Privacy Policy

© 2024 Design And Reuse

All Rights Reserved.

No portion of this site may be copied, retransmitted, reposted, duplicated or otherwise used without the express written permission of Design And Reuse.